Massively Parallel Architectures

Wednesday 10th October 2007, 6:30 pm

Speakers: Dr. Colin Egan and Jason McGuiness, Department of Computer Science, University of Hertfordshire

Venue: The Royal Scots Club Hepburn Suite, 30 Abercromby Place, Edinburgh EH3 6QE - map and direction.

This talk is free of charge and no reservation is required. Non members are most welcome. Refreshments available from 6:10 pm.


The memory wall problem is a major contributing factor to limiting processor performance which is a result of memory access times not matching the dramatic increases in processor speeds. Traditionally the memory wall problem has been overcome by introducing extra levels in the memory hierarchy. Unfortunately, such an approach also increases the design complexity and power consumption of the overall computer system. Furthermore, there is an increase in the penalty associated with a miss in the memory-subsystem resulting in a limitation of the exploitation of Instruction Level Parallelism (ILP).

Integrating the processing logic and memory simplifies the system design complexity, can reduce power cost and certainly reduces memory subsystem access times. This technique is termed Processing In Memory (PIM). PIM architectures may improve data-processing and data-access times, but the processor speed and the quantity of fast memory available are reduced. However, many PIM cells can be connected together to form massively parallel architectures which are called Cellular Architectures.

A major difficulty has been that too few important application programs have been successfully written to fully utilize the available parallelism that can be achieved by PIM cells. Writing code is (and will remain) a major challenge to multiprocessor/PIM application programmers, as they must able to write programs that can be readily parallelized to maximize the usage of the underlying architecture.

At the University of Hertfordshire we have been investigating compilation/code generation for such massively parallel architectures. This work has been carried out using the Delaware Interactive Multiprocessor Emulator System (DIMES), which is the first hardware implementation of a Cellular Architecture.

About the speakers


Colin Egan graduated from the University of Hertfordshire, with a BSc (Hons) in Computer Science (Systems Engineering) in 1996. Subsequently to this, he was awarded a PhD in Computer Architecture in 2000, also from the University of Hertfordshire. Previously, Colin worked for the National Health Service in the U.K. specialising in Clinical Microbiology (1978 – 1991). In 1991, he joined the University of Hertfordshire as a research assistant in the Department of Natural Sciences, researching into ‘Neurotoxicology alternatives to animal testing.’ Since completion of his BSc in Computer Science he made a career change and has been working on high performance processing, multiprocessor systems and energy conservation computing. Colin has gained an international reputation for his work and is a member of a number of international program committees. He has over twenty-five published papers, mainly in Computer Architecture, some in Neurotoxicology and some in teaching and learning.

  Jason MCGuiness graduated from the University of Bristol with a joint BSc (Hons) in Mathematics and Physics in 1990. Since graduating from Bristol, Jason has worked for a number of well known International Companies as a technical architectural/software developer. Jason is currently working as a Manager at Barclays Capital where he is a Front Office Senior Developer. In 2005, Jason took a year’s break from the rigours of professional work and undertook a period of research on ‘The Challenges of Writing Software for Massively Parallel Architectures.’ Jason was awarded an MSc(Research) from the University of Hertfordshire in 2006 for this work. During the course of his research, Jason gave three seminars in the USA, three seminars in the UK, one seminar in the Netherlands and he has also presented a conference paper in China, which has subsequently been published in Springer Lecture Notes in Computer Science.