Massively Parallel Architectures
Wednesday 10th October 2007, 6:30 pm
Speakers: Dr. Colin Egan and Jason McGuiness, Department of Computer Science, University of Hertfordshire
Venue: The Royal Scots Club Hepburn Suite, 30 Abercromby Place, Edinburgh EH3 6QE - map and direction.
This talk is free of charge and no reservation is required. Non members are most welcome. Refreshments available from 6:10 pm.
The memory wall problem is a major contributing factor to limiting processor performance which is a result of memory access times not matching the dramatic increases in processor speeds. Traditionally the memory wall problem has been overcome by introducing extra levels in the memory hierarchy. Unfortunately, such an approach also increases the design complexity and power consumption of the overall computer system. Furthermore, there is an increase in the penalty associated with a miss in the memory-subsystem resulting in a limitation of the exploitation of Instruction Level Parallelism (ILP).
Integrating the processing logic and memory simplifies the system design complexity, can reduce power cost and certainly reduces memory subsystem access times. This technique is termed Processing In Memory (PIM). PIM architectures may improve data-processing and data-access times, but the processor speed and the quantity of fast memory available are reduced. However, many PIM cells can be connected together to form massively parallel architectures which are called Cellular Architectures.
A major difficulty has been that too few important application programs have been successfully written to fully utilize the available parallelism that can be achieved by PIM cells. Writing code is (and will remain) a major challenge to multiprocessor/PIM application programmers, as they must able to write programs that can be readily parallelized to maximize the usage of the underlying architecture.
At the University of Hertfordshire we have been investigating compilation/code generation for such massively parallel architectures. This work has been carried out using the Delaware Interactive Multiprocessor Emulator System (DIMES), which is the first hardware implementation of a Cellular Architecture.
About the speakers